Time synchronization method and apparatus for domain controller, domain controller and storage medium

ABSTRACT

A time synchronization method, apparatus, domain controller, and storage medium are disclosed. The domain controller is mounted in a vehicle and includes a number of SoCs and micro control units. The SoCs and micro control units are respectively, communicatively connected through the controller area network bus and respectively connected to the switch via Ethernet. The switch has external Ethernet interfaces. A main SoC in the number of SoCs has external UART/PPS interfaces and the micro control units have external FlexRay interfaces. The time synchronization method of the domain controller includes any one of the steps of receiving a time service from an external device through the UART/PPS interfaces, receiving a time service from the external device through the switch over the Ethernet interface, or receiving a time service from the external device through the FlexRay interface under a normal operation phase of the vehicle.

CROSS-REFERENCE TO RELATED APPLICATIONS

The disclosure claims priority to Chinese patent disclosure No.202110384961.7, filed on Apr. 9, 2021, the entire contents of which areincorporated herein by reference.

TECHNICAL FIELD

The present disclosure relates to the field of in-vehicle electronictechnologies, and more specifically, to a time synchronization methodand apparatus for a domain controller, domain controller, and storagemedium.

BACKGROUND

With the rapid development of autonomous driving technologies,automotive electronic electrical architectures are evolved fromtraditional distributed electronic control units (ECUs) to centralizedcentral controllers or domain controllers. The domain controller canaccomplish tasks such as perception, planning, localization,decision-making, etc. of intelligent driving or autonomous driving, andcompletes real-time control of the vehicle, which requires the domaincontroller to not only have strong computing power, but also to ensurefunctional safety for all tasks to be performed. However, it is oftenpossible to provide a SoC (SOC) of high computing power that cannot allmeet the ASIL-D security level requirements from hardware to software,and therefore, the domain controller typically consists of multipleprocessors, including one or more chip scale SoCs and a micro controllerunit (MCU) that conforms to the ASIL-D security level requirements. Inwhich the SoC provides computing power support. The micro control unitis responsible for the system control of the domain controller and incommunication with the vehicle chassis to control the vehicle.

Among multiple processors inside the domain controller, high precisiontime synchronization must be made to cooperatively complete theautonomous driving task. Typically, the delay of all communicationswithin the domain controller should not exceed 1 ms, so the timesynchronization accuracy inside the domain controller should also bebelow 1 ms. The domain controller also typically requires a device, suchas an On-Board Unit (OBU) or a Telematics BOX (T-Box), to communicatewith a cloud service or road facility, and therefore also needs toimplement satellite authorization through a Global Navigation SatelliteSystem (GNSS) receiver to synchronize time to the external absolutetime, such as Universal Time Coordinated (UTC) time. Further, somesensors, such as cameras, lidars, millimeter-wave radars, and the like,are all require a time service from the domain controller.

On conventional vehicle electronic electrical architectures,synchronization of electronic control unit time can be accomplished byusing a FlexRay bus. Currently, on smart vehicles, it is most common tosynchronize schemes at a single time. These methods are only applicableto time synchronization of a single electronic control unit orcomponent, and the scalability is poor, thus failing to meet the diversetime synchronization needs of current automated driving domaincontroller.

SUMMARY

In view of the above, it is necessary to provide a time synchronizationmethod and apparatus, a domain controller, and a storage medium capableof improving the diversity and scalability of domain controller timesynchronization for the above technical problems.

In one aspect, a time synchronization method for a domain controller isprovided. The domain controller is mounted in a vehicle and includes anumber of system-on-chips (SoCs) and micro control units (MCUs). Thenumber of the SoCs and the MCUs are respectively communicativelyconnected by a controller area network bus and are respectivelycommunicatively connected to a switch through an Ethernet. The switchhas external Ethernet interfaces. A main SoC among the number of theSoCs has external universal asynchronous receiver/transmitter(UART)/pulse per second (PPS) interfaces. Each of the micro controlunits has an external FlexRay interface. The time synchronization methodfor a domain controller includes causing the domain controller to, undera normal operating phase of the vehicle, perform any of the steps asfollows:

-   -   receiving a time service from an external device through the        UART/PPS interfaces;    -   receiving a time service from the external device through the        Ethernet interfaces via the switch; and    -   receiving a time service from the external device through the        FlexRay interface.

In on embodiment, the step of receiving a time service from an externaldevice through the UART/PPS interfaces includes the steps of:

-   -   communicatively connecting to global navigation satellite system        (GNSS) timing source by the main SoC through the UART/PPS        interfaces; receiving the PPS from the GNSS timing source and a        coordinated universal time (UTC); and synchronizing a main SoC        time to the UTC by the PPS and the UTC;    -   taking the synchronized main SoC time as a master clock of a        precise clock synchronization protocol in the internal local        area network of the domain controller; taking the remaining SoCs        among the number of SoCs except the main SoC and the micro        control units as the slave clock of the precise clock        synchronization protocol; and performing precise clock        synchronization protocol time synchronization on the remaining        SoCs and the MCU to the synchronized main SoC time; and updating        a real time clock time inside the MCU to the main SoC time and        stopping broadcasting a time message of the MCU on the        controller area network bus after the MCU completes the time        synchronization of the precise clock synchronization protocol.

In on embodiment, the step of receiving a time service from the externaldevice through the Ethernet interfaces via the switch includes the stepsof:

-   -   communicatively connected to an external clock source by the        domain controller through the Ethernet interface via the switch;        taking the external clock source as a master clock of the        precise clock synchronization protocol; taking the number of the        SoCs and the MCUs of the domain controller as slave clocks of        the precise clock synchronization protocol; performing precise        clock synchronization protocol time synchronization on the        number of the SoCs and the micro control unit of the domain        controller to the synchronized main SoC time; updating a real        time clock time inside the MCU to the main SoC time and stopping        broadcasting a time message of the MCU on the controller area        network bus after the MCU completes the time synchronization of        the precise clock synchronization protocol.

In one embodiment, the step of receiving a time service from theexternal device through the FlexRay interface includes the steps of:

-   -   connecting to a vehicle FlexRay bus, by the MCU, through the        FlexRay interface and a FlexRay bus; synchronizing the MCU to a        vehicle device time connected to the vehicle FlexRay bus through        a FlexRay time;    -   updating areal time clock time inside the MCU to the vehicle        device time and stopping broadcasting a time message of the MCU        on the controller area network bus after the MCU completes the        time synchronization of the precise clock synchronization        protocol;    -   taking the MCU as a master clock of the precise clock        synchronization protocol of an internal local area network of        the domain controller; taking the plurality of the SoCs as slave        clocks of the precise clock synchronization protocol; performing        precise clock synchronization protocol time synchronization on        the plurality of the SoCs to the synchronized main SoC time.

In one embodiment, the time synchronization method for a domaincontroller further includes, under a normal operating phase of thevehicle and after the domain controller accepts the time service,causing the domain controller to perform any one or more of thefollowing steps to provide the time service to one or more externaldevices:

-   -   providing the time service to external devices via the UART/PPS        interfaces; providing the time service to external devices        through the Ethernet interface via the switch; and providing the        time service to external devices via the FlexRay interface.

In one embodiment, during a start-up phase of the vehicle prior to thenormal operating phase of the vehicle, the method further includeswaking up the MCU in a dormant state through a wake-up message of acontroller area network bus of a vehicle, so that the MCU enters anormal working state; powering, resetting each SOC in the plurality ofSOCs by the MCU and broadcasting a time message of the MCU generatedaccording to a time count of a real-time clock of the MCU on thecontroller area network bus; and synchronizing an initial time of eachof the SoCs to the time of the MCU by using the time message of the MCUbroadcasted on the controller area network bus after each of the SoCs isreset.

In one embodiment, the step of synchronizing an initial time of each ofthe SoC to the time of the MCU by using the time message of the MCUbroadcasted on the controller area network bus after each of the SoCs isreset includes: starting a safety island processor in each of the SoCsafter each of the SoCs is reset, receiving the time message of the MCUby the safety island processor through the controller area network busso as to read a latest initialization time and correct the time of thesafety island processor to the latest initialization time; initiating,by the safety island processor in each of the SoCs, a general processorin the SoC where the safety island processor is located; and requesting,by each of the general processor, the current time of the safety islandprocessor in the SoC where the general processor is located through aninter-core communication mode in a starting stage of the embeddedsystem, and synchronizing the time of the embedded system of the generalprocessor to the current time of the safety island processor.

In one embodiment, the time synchronization method for the domaincontroller further includes recording, by each general processor, astartup log of the startup phase by utilizing the current time of therequested safety island processor during the startup phase of itsembedded system.

In one embodiment, in a stop phase of the vehicle before the start phaseof the vehicle, the MCU is connected to a power supply of the vehicleand is kept powered on; the SoC is in a power-off state, and the MCU isin a sleep state; the real-time clock of the MCU maintains time countingin the sleep state.

In another aspect, a time synchronization apparatus of a domaincontroller for performing time synchronization of a domain controller isprovided. The domain controller is mounted in a vehicle. The domaincontroller includes a number of system-on-chips (SoCs) and micro controlunits (MCUs). The number of SoCs and the MCUs are respectivelycommunicatively connected through a controller area network bus and arerespectively connected to a switch through an Ethernet communication.The switch is provided with external Ethernet interfaces. A main SoC inthe number of SoCs is provided with an external universal asynchronousreceiver/transmitter (UART)/pulse per second (PPS) interface; and eachof the MCUs is provided with an external FlexRay interface. The timesynchronization apparatus of a domain controller includes a time serviceaccepting module, configured to, enable the domain controller toselectively execute any one of the following steps to accept a timeservice during a normal working phase of the vehicle: receiving the timeservice from an external device through the UART/PPS interface;receiving the time service from an external device through the Ethernetinterface through the switch; and receiving the time service from anexternal device through the FlexRay interface.

In another aspect, a domain controller mounted in a vehicle is provided.The domain controller includes a number of system-on-chips (SoCs) andmicro control units (MCUs). The number of the SoCs and the MCUs arerespectively communicatively connected by a controller area network busand are respectively communicatively connected to a switch through anEthernet. The switch is provided with external Ethernet interfaces. Amain SoC among the plurality of the SoCs is provided external universalasynchronous receiver/transmitter (UART)/pulse per second (PPS)interfaces; and each of the MCUs is provided with an external FlexRayinterface. The domain controller selectively executes any one of thefollowing steps to accept a time service during a normal working phaseof the vehicle: receiving the time service from an external devicethrough the UART/PPS interface; receiving the time service from anexternal device through the Ethernet interface through the switch; andreceiving the time service from an external device through the FlexRayinterface.

A computer readable storage medium having stored there on a computerprogram, the computer program, when executed by a processor, selectivelyexecute any one of the following steps to accept a time service during anormal working phase of the vehicle: receiving the time service from anexternal device through the UART/PPS interface; receiving the timeservice from an external device through the Ethernet interface throughthe switch; and receiving the time service from an external devicethrough the FlexRay interface.

In the time synchronization method, apparatus, computer device, andstorage medium of the domain controller described above, the domaincontroller is mounted in a vehicle, and connected with variousinterfaces, such as an Ethernet interface, a universal asynchronousreceiver/pulse per second interface, and a FlexRay interface. When timesynchronization is made to the domain controller, the timesynchronization to the domain controller can be accomplished byselecting either of the interfaces according to the actual requirementsand accepting an external time service by performing a timesynchronization step corresponding to an interface type. As such,between the multiple domain controllers in a vehicle, or between adomain controller and other components of a vehicle, the connections canbe flexibly concatenated by a variety of interfaces provided by thedomain controller to provide time service to each other, thuseffectively improving the diversity of domain controller timesynchronization and scalability.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a schematic diagram of a domain controller according to oneembodiment.

FIG. 2 is a schematic diagram of various stages of a vehicle in oneembodiment.

FIG. 3 is a flow diagram of a time synchronization method of a domaincontroller in one embodiment.

FIG. 4 is a flow diagram of a time synchronization method of a domaincontroller in another embodiment.

FIG. 5 is a flow diagram of a time synchronization method of a domaincontroller in accordance with another embodiment.

FIG. 6 is a block diagram of a time synchronization apparatus of adomain controller in one embodiment.

DETAILED DESCRIPTION OF THE EMBODIMENTS

For a clearer understanding of the objects, technical solutions, andadvantages of the present application, further detailed description ofthe disclosure is given below in connection with the accompanyingdrawings and embodiments. It should be understood that the specificembodiments described herein are merely illustrative of the applicationand are not intended to limit the application.

The time synchronization method of the domain controller provided hereincan be applied to perform time synchronization for domain controller 100as shown in FIG. 1 . The domain controller 100 is mounted in a vehicle.The domain controller 100 includes a number of System-on-Chip (SOCs) 110(SOC-0, SOC-1, and SOC-N as shown in the figures) and micro controlunits (MCUs) 120. The number of SoCs 110 and the micro control units 120are communicatively connected via a Controller Area Network (CAN) bus,respectively, and are respectively connected to the switch 130 throughan Ethernet communication. The switch 130 has external Ethernetinterface 140. It is to be understood that the switch 130 can becontained within the domain controller 100 or external to domaincontroller 100. The main SoC (SOC-0) 111 among the number of SoCs 110has a Universal Asynchronous Receiver/Transmitter (UART)/Pulse PerSecond (PPS) interface 150. The micro control unit 120 has an externalFlexRay interface 160.

Among them, the PHY chips and switch chips within the domain controller110 support IEEE 1588v2. The SoC 110 can be a car-level SoC, forexample, a BST A1000 chip introduced by the black sesame smarttechnology, which provide Ethernet Gigabit Media Access Control (GMAC)supporting the IEEE 1588v2 protocol, a safety island function with amulticore general processor, and has a safety island processor. Themicro control unit 120 may be a car-level ASIL-D micro control unitchip, the Ethernet G MAC of which supports the IEEE 1588v2 protocol. Itfurther provides a FlexRay interface, which keeps a time count of thereal time clock (Real_Time Clock, RTC) in the dormant state.

The time synchronization method of the domain controller providedherein, as shown in FIG. 2 , may be performed at three different phases:a stop work phase s10 of the vehicle, a startup phase s20 of the vehicleafter the stop work phase s10 of the vehicle, and a normal operationphase s30 of the vehicle after the startup phase s20 of the vehicle. Itwill be appreciated that if the vehicle stops operating in the vehiclenormal operating phase s30, the vehicle would again enter the stopworking phase s10.

In one embodiment, as shown in FIG. 3 , a time synchronization method ofa domain controller is provided. S300, in the normal operation phase S30of the vehicle, the domain controller is caused to perform any of thefollowing steps to accept the time service:

Step S310, receiving a time service from an external device through theUART/PPS interfaces;

Step S320, receiving a time service from the external device through theEthernet interfaces via the switch; and

Step S330, receiving a time service from the external device through theFlexRay interface.

Where, in various embodiments of the disclosure, the external device ofthe domain controller refers to devices other than the domaincontroller. The device can be other devices inside the vehicle ordevices external to the vehicle, such as other domain controllers withinthe vehicle, other electronic control units or various sensors, etc., orother devices external to the vehicle, vehicles, etc.

In the time synchronization method of the domain controller describedabove, the domain controller is mounted in the vehicle. The domaincontroller is connected to various interfaces such as an Ethernetinterface, a universal asynchronous receiver (UART)/pulse per second(PPS) interface, and a FlexRay interface. When time synchronization ismade to the domain controller, the time synchronization to the domaincontroller can be accomplished by selecting either of the interfacesaccording to the actual requirements and accepting an external timeservice by performing a time synchronization step corresponding to theinterface type. As such, among the multiple domain controllers in avehicle, or between a domain controller and other components of avehicle, multiple interfaces provided by the domain controllers can beflexibly connected in tandem to receive time service from each other,thereby effectively improving the diversity of domain controller timesynchronization and extensible, which can meet the need for timesynchronization of multiple SoCs, MCUs, and multiple sensors of anautomated driving domain controller.

In the normal operation phase s30 of the vehicle, the real time clocktime inside each individual SoC and the MCU is updated in real time tothe time of the external device. If the vehicle stops working in thevehicle normal operation phase s30, and enters into the vehicle's stopwork phase s10, each SoC goes into a powered-off state, and the realtime clock inside the microcontroller unit continues to keep the clockcount on the basis of the current latest update time in preparation forproviding the time message broadcast on the controller area network busat the next cycle vehicle startup phase.

In one embodiment, when the external device in step S310 is a globalnavigation satellite system timing source, the step S310 of receiving atime service from an external device through the UART/PPS interfacesincludes as follows. The main SoC is communicatively connected to theglobal navigation satellite system (GNSS) timing source through theUART/PPS interfaces. The PPS and a coordinated universal time (UTC) isreceived from the GNSS timing source. A main SoC time is synchronized tothe UTC by the PPS and the UTC. The synchronized main SoC time is takenas a master clock of a precise clock synchronization protocol in theinternal local area network of the domain controller. The remaining SoCsamong the number of SoCs except the main SoC and the micro control unitsare taken as the slave clock of the precise clock synchronizationprotocol. A precise clock synchronization protocol time synchronizationis performed on the remaining SoCs and the MCU to the synchronized mainSoC time. A real time clock time inside the MCU is updated to the mainSoC time and a time message of the MCU is stopped broadcasting on thecontroller area network bus after the MCU completes the timesynchronization of the precise clock synchronization protocol.

Wherein, the GNSS timing source is a device for providing a PPS and UTCrequired in the global navigation satellite system timing. The devicecan be a device internal and/or external to the vehicle, for example,the global navigation satellite system timing source can be a globalnavigation satellite system receiver that receives signals from theglobal navigation satellite system and provides the PPS and the UTC tothe local domain controller. Or the global navigation satellite systemtiming source can also be an upper level domain controller within thevehicle or other components of the vehicle that act as a globalnavigation satellite system timing server to provide the PPS and the UTCto the local domain controller.

In one embodiment, the external device in step S320 may be an externalclock source external to the domain controller. The step S320 ofreceiving a time service from the external device through the Ethernetinterfaces via the switch includes as follows. The domain controller iscommunicatively connected to an external clock source through theEthernet interface via the switch. The external clock source is taken asa master clock of the precise clock synchronization protocol. The numberof the SoCs and the MCUs of the domain controller are taken as slaveclocks of the precise clock synchronization protocol. A precise clocksynchronization protocol time synchronization is performed on the numberof the SoCs and the micro control unit of the domain controller to thesynchronized main SoC time. A real time clock time inside the MCU isupdated to the main SoC time and a time message of the MCU is stoppedbroadcasting on the controller area network bus after the MCU completesthe time synchronization of the precise clock synchronization protocol.

Wherein, the external clock source, an external device of the domaincontroller, is a device that provides a clock synchronization signal asa master clock of a precise clock synchronization protocol. The devicemay be a device internal and/or external to the vehicle, such as may bean upper level domain controller within the vehicle or other componentsof the vehicle, or a timing device or a timing server external to thevehicle, or the like.

In one embodiment, in step S330, the step of receiving a time service bythe domain controller through the FlexRay interface includes as follows.The MCU is connected to a vehicle FlexRay bus through the FlexRayinterface and a FlexRay bus. The MCU is synchronized to a vehicle devicetime connected to the vehicle FlexRay bus through a FlexRay time. A realtime clock time inside the MCU is updated to the vehicle device time anda time message of the MCU is stopped broadcasting on the controller areanetwork bus after the MCU completes the time synchronization of theprecise clock synchronization protocol. The MCU is taken as a masterclock of the precise clock synchronization protocol of an internal localarea network of the domain controller. The number of the SoCs are takenas slave clocks of the precise clock synchronization protocol. A preciseclock synchronization protocol time synchronization is performed on thenumber of the SoCs to the synchronized main SoC time.

Therein, a vehicle device is a vehicle interior device providing a clocksynchronization signal for FlexRay time synchronization to a domaincontroller, such as an electronic control unit, which may be a vehiclechassis or body as a master clock, and the like.

In one embodiment, as shown in FIG. 4 , the time synchronization methodof the domain controller may further include the step of causing thedomain controller to provide a time service. The step of causing thedomain controller to provide the time service outward includes asfollows.

Step S400, after the normal operation phase s30 of the vehicle, thedomain controller completes its own time synchronization by performingany of steps S310, S320, and S330 to accept the time service, the domaincontroller is caused to perform any one or more of the following stepsto provide the time service to the one or more external devices.

Step S410: providing a time service to the external device through theuniversal asynchronous receiver/PPS interface;

In a cascaded scenario for HashRate expansion, one of the processors ofthe local controller (e.g., may select the SOC-0 110) may act as theglobal navigation satellite system timing source after the localcontroller completes the time synchronization, when the external deviceoutputs a second pulse and coordinates the world through the universalasynchronous receiver/second pulse through step S410 to time service theexternal device; accordingly, the external device performs step S320 toaccept the time service from the local domain controller through theuniversal asynchronous transfer transmitter/PPS.

Step S420, providing a time service to the external device through theEthernet interface through the switch;

Wherein, when the external device receives time service through theEthernet through the step S420, there is a need in the MCLI 120 with oneof the number of SoCs 110 and the MCU 120 with one of the processorsacting as a Precision Time Protocol (PTP) time synchronized master clock(e.g., the SOC-0 110 may be selected as the master clock for the preciseclock synchronization protocol time synchronization). The varioussub-components of the external device are operated as a slave clocksynchronized with the precise clock synchronization protocol time toprovide the precise clock synchronization protocol time synchronizationservice to the external device. Accordingly, the external deviceperforms the step S320 to accept the time service from the local domaincontroller.

Step S430, providing a time service to the external device through theFlexRay interface.

Wherein, when the time service is provided to the external devicethrough the FlexRay interface in step S430, there is a need in the MCU120 with one of the number of SoCs 110 and the MCU 120 in which one ofthe processors acts as a FlexRay bus connection. A clock synchronizationsignal of FlexRay is sent over a FlexRay bus to an external device toprovide a FlexRay time synchronization service to an external device.Accordingly, the external device performs the step S330 to accept a timeservice from a local domain controller.

In this embodiment, once the domain controller has completed its owntime synchronization, one or more external devices (e.g., next leveldomain controllers, vehicle sensors, etc. other components or devicesexternal to the vehicle, etc.) may also be provided by one or more of anEthernet interface, a universal asynchronous receiver/PPS interface, anda FlexRay interface. As such, among the number of the domain controllersin the vehicle, the domain controller and the other devices of thevehicle may be arbitrarily joined by any suitable type of interface asdesired to provide time service level by level from the upper levelcomponent to the next level component, thereby enabling to complete thetiming between the various components in the vehicle flexibility.

In one embodiment, as shown in FIG. 5 , the time synchronization methodof the domain controller of the vehicle prior to the normal operatingphase s30 of the vehicle (i.e. S20 the starting phase of the vehicle)further includes:

S210, waking up the message through the controller area network bus ofthe vehicle, waking up the MCU in the dormant state to bring the MCUinto a normal operating state;

Therein, a real time clock of the MCU in a sleep state is maintainedcounting at a stop work phase s10 of the vehicle.

S220, the MCU enables each of the number of the SoCs to be powered andreset and broadcasts a time message of the MCU generated according tothe time counting of the real time clock of the MCU on the controllerarea network bus.

S230, after each of the SoCs is reset, the time messages of the microcontrol units broadcasted on the controller area network bus areutilized to synchronize the initial time of each of the SoCs to the timeof the MCU.

In this embodiment, prior to the vehicle starting phase, the MCU is inthe sleep state and maintain the time counting, which can be performedby waking up each of the SoCs through waking up each of the MCU, therebyeliminating the need for the SoC to hold the RTC chip and the batterywithout having to replace the battery in order to provide the initialtime to the SoC without replacing the battery, effectively reducingdevice cost, and improving ease of use.

In one embodiment, each of the SoCs includes a safety island processorand a general processor. After each of the SoCs in step S230 is reset,an initial time of each of the SoCs is synchronized to the MCU time byusing the time messages of the MCU on the controller area network busincludes as follows. The safety island processors in each of the SoCsare activated after each of the SoCs is reset. The safety islandprocessor receives the time messages of the MCU over the controller areanetwork bus to read the latest initialization time and synchronize thetime of the safety island processor itself to the latest initializationtime. The safety island processor in each of the SoCs initiates thegeneral processor in the SoC where the safety island processor islocated. Each general processor requests the current time of the safetyisland processor in the SoC where the general processor is locatedduring the boot stage of its embedded system and synchronizes the timeof the embedded system of the general processor to the current time ofthe safety island processor.

With respect to the general processor, the safety island processor ofthe SoC and the software running on the safety island processor canachieve higher security levels, independent of the general processor,which can be used for functional safety control and information securityof the vehicle.

In one embodiment, the time synchronization method of the domaincontroller further includes recording, by each of the generalprocessors, the boot log of the boot stage with the current time of therequested safety island processor during the boot stage of its embeddedsystem.

Otherwise, the embedded system is in an unsynchronized state, its timebeing a mirror wrap time or a default initial time (e.g., Jan. 1, 1970).

In this embodiment, the operating system on the general processor startsthe log, and the log data is stored on the off-chip eMMC by thepersistence software module of the operating system. When the timeservice is provided to the embedded system in its startup phase, thetime of the boot log of the boot phase may be mapped to the currenttime, rather than all of the boot phases' boot logs being recorded atthe mirror wrap time or the default initial time. The time to start thelog corresponds to the current time, and when the chip starts to fail,the exact time at which the fault occurred can be found to effectivelyanalyze the cause of the fault.

In one embodiment, at a stop operating phase S10 of the vehicle prior tothe starting phase S20 of the vehicle, the MCU is connected to a powersource of the vehicle and remains powered on, the SoC is in an offstate, the micro control unit is in a sleep state, and the real timeclock of the micro control unit maintains a time counting in a sleepstate.

In this embodiment, by maintaining the time counting of the real timeclock of the MCU in the sleep state, the broadcasting of the timemessage of the MCU on the domain controller internal controller areanetwork bus using the real time clock of the MCU at the vehicle startingstage S20 is facilitated to provide the domain controller with theinitial time synchronization.

It should be understood that while the various steps in the flowdiagrams of FIGS. 2-5 are shown in turn in the order of arrows, thesesteps are not necessarily performed in the order indicated by thearrows. The steps of these steps are not limited by the exact orderunless expressly specified herein, and the steps may be performed inother sequences. Moreover, at least a portion of the steps in FIGS. 2-5may include a number of sub-steps or stages, which are not necessarilyperformed at the same time, but may be performed at different times, theorder of execution of the sub-steps or stages is not necessarilyperformed in turn, but may be performed in turn or alternatively with atleast a portion of the sub-steps or stages of other steps or othersteps.

In one embodiment, as shown in FIG. 6 , a time synchronization apparatus600 of a domain controller is provided, which may be included in thedomain controller 100 for performing time synchronization of the domaincontroller 100. The domain controller 100 is mounted in a vehicle andincludes a number of SoCs 110 and MCUs 120. The number of SoCs 110 andthe MCUs 120 are respectively communicatively connected via a controllerarea network bus and are respectively connected to the switch 130through Ethernet communication. The switch 130 has an external Ethernetinterface 140. The main SoC 111 among the number of SoCs 110 has a pairof external universal asynchronous/second transmitter/PPS interfaces150. The MCU 120 has an external FlexRay interface 160.

The time synchronization apparatus 600 of the domain controller includea time service accepting module, configured to enable the domaincontroller to selectively execute any one of the following steps toaccept a time service during a normal working phase of the vehicle:

-   -   receiving the time service from an external device through the        UART/PPS interface;    -   receiving the time service from an external device through the        Ethernet interface through the switch; and    -   receiving the time service from an external device through the        FlexRay interface.

In one embodiment, the time service accepting module 610, when enablingthe domain controller to receive the time service from the externaldevice via the universal asynchronous receiver/PPS interface, is furtheroperative to cause: the main SoC to be communicatively connected to theglobal navigation satellite system timing source through the universalasynchronous receive transmitter/PPS, to receive the pulse per secondfrom the global navigation satellite system timing source, and tosynchronize the main SoC time to the UTC using the pulse per second andthe UTC, The time synchronized main SoC is taken as the master clock ofthe precise clock synchronization protocol in the internal local areanetwork of the domain controller, to synchronize the remaining SoCsamong the number of SoCs other than the main SoC and the MCU as a slaveclock to the precise clock synchronization protocol, to synchronize theremaining SoCs and the micro control unit to the time at which the fineclock synchronization protocol time is synchronized to the main SoC. Thereal time clock time inside the MCU is updated to the time of the mainSoC after the MCU completes the precise clock synchronization protocoltime synchronization and stop broadcasting the time messages of the MCUon the controller area network bus.

In one embodiment, the time service accepting module 610, when used tocause the domain controller to accept the time service from the externaldevice through the Ethernet interface via the switch, is furtheroperative to cause: the domain controller to communicatively connect tothe external clock source through the Ethernet interface via the switch,to synchronize the external clock source to the master clock of theprecise clock synchronization protocol, to synchronize the number ofSoCs of the domain controller and the MCU to the slave clock of theprecise clock synchronization protocol, to synchronize the number ofSoCs of the domain controller and the MCU to execute the precise clocksynchronization protocol time to the time of the main SoC; to update thereal time clock time inside the MCU to the time of the main SoC and tostop broadcasting the time messages of the MCU on the controller areanetwork bus after the micro control unit has completed the precise clocksynchronization protocol time synchronization.

In one embodiment, the time service accepting module 610, when enablingthe domain controller to receive the time service from the externaldevice through the FlexRay interface, is further operative to cause: theMCU to connect, via the FlexRay interface, to the FlexRay bus of thevehicle over the FlexRay bus; to synchronize the MCU to the vehiclecomponent of the vehicle FlexRay bus connection over the FlexRay time.After the MCU completes the FlexRay time synchronization, the real timeclock time inside the MCU is updated to the time of the vehicle deviceand the time message of the MCU is stopped broadcasting on thecontroller area network bus. The MCU is taken as the master clock of theprecise clock synchronization protocol of the internal local areanetwork of the domain controller, and the number of SoCs are taken asthe slave clock of the precise clock synchronization protocol. Theprecise clock synchronization protocol time synchronization is performedon the SoCs to synchronize the time of the SoCs to the MCU time.

In one embodiment, the time synchronization apparatus 600 of the domaincontroller further includes a time service transmission module 620 forcausing the domain controller to perform any one or more of thefollowing steps to provide the time service to the one or more externaldevices upon accepting the time service of the domain controller duringthe normal operation phase of the vehicle.

-   -   receiving the time service from an external device through the        UART/PPS interface;    -   receiving the time service from an external device through the        Ethernet interface through the switch; and    -   receiving the time service from an external device through the        FlexRay interface.

In one embodiment, the time synchronization apparatus 600 of the domaincontroller further includes an initial time synchronization module 630for waking up the message through the controller area network bus of thevehicle. The MCU in the sleep state is waked up to cause the MCU toenter a normal operating state in a starting phase of the vehicle priorto the normal operation phase of the vehicle. The MCU enables each ofthe number of SoCs to cause each SoC to be powered and reset and tobroadcast on the controller area network bus a time message of the MCUgenerated according to the time counting of the real time clock of theMCU. The time messages of the MCU broadcasted on the controller areanetwork bus after each of the SoCs is reset to synchronize the variousSoC initial time to the time of the MCU.

In one embodiment, the initial time synchronization module 630 isconfigured to, after the time messages used to broadcast the MCU on thecontroller area network bus and after the reset of each of the SoCs,synchronize the initial time of the various SoC to the MCU time, furtherfor enabling the safety island processors in each of the SoCs to bootafter each of the SoCs is reset. The safety island processor receivesthe time messages of the MCU through the controller area network bus toread the latest initialization time and modifies the time of the safetyisland processor itself to the latest initialization time. The safetyisland processor in each of the SoCs initiates a general processor inthe SoC where the safety island processor is located. Each generalprocessor requests the current time of the safety island processor inthe SoC where the general processor is located during the boot stage ofits embedded system and synchronizes the time of the embedded system ofthe general processor to the current time of the safety islandprocessor.

In one embodiment, the initial time synchronization module 630 isfurther configured to cause each of the general processor to record thestartup log of the starting phase with the current time of the requestedsafety island processor during the starting phase of its embeddedsystem.

In one embodiment, the time synchronization apparatus 600 of the domaincontroller further includes a dormancy module 640 for stopping theoperation phase of the vehicle prior to the activation phase of thevehicle such that the MCU is connected to the power source of thevehicle and remains powered on, the SoC is in a power-off state, the MCUis in a sleep state, and the real time clock of the MCU maintains a timecounting in the sleep state.

The specific definition of the time synchronization apparatus 600 withrespect to the domain controller may be referred to above with respectto the time synchronization method of the domain controller, and willnot be repeated herein. The various modules in the time synchronizationapparatus 600 of the domain controller described above may beimplemented in whole or in part by software, hardware, and combinationsthereof. The modules described above may be embodied in hardware, in aprocessor in a computer device, or in a memory in a computer device, insoftware, in order to facilitate processor calls to perform theoperations corresponding to the various modules above.

In one embodiment, as shown in FIG. 1 , a domain controller 100 mountedin a vehicle is provided. The domain controller 100 includes a number ofSoCs 110 and MCUs 120. The number of SoCs 110 and the MCUs 120 arerespectively communicatively connected via a controller area network busand are respectively connected to the switch 130 through an Ethernetcommunication. The switch 130 has an external Ethernet interface 140. Amain SoC 111 among the number of the SoCs 110 has external universalasynchronous/second transmitter/PPS interfaces 150. The MCU 120 has anexternal FlexRay interface 160.

The domain controller 100 performs the following steps:

-   -   the domain controller 100 is enabled to perform anyone of the        steps to receive a time service during the normal operation        phase of the vehicle:    -   receiving the time service from an external device through the        UART/PPS interface;    -   receiving the time service from an external device through the        Ethernet interface through the switch; and    -   receiving the time service from an external device through the        FlexRay interface.

In other embodiments, the domain controller also performs the steps ofthe synchronization method of the domain controller as in any of theabove embodiments and has corresponding benefits.

In one embodiment, a time synchronization system of a vehicle is alsoprovided. The time synchronization system of the vehicle is mounted in avehicle. The time synchronization system of the vehicle includes anumber of domain controllers cascaded with each other,

Each domain controller of the number of domain controllers can be adomain controller of any of the above embodiments.

During the normal operation phase of the vehicle, among the number ofdomain controllers, each domain controller is cascaded up with onedomain controller or vehicle component up through one of its UniversalAsynchronous Receiver/PPS interfaces, Ethernet interfaces, and FlexRayinterfaces, and received from the domain controller or vehicle device,and the each domain controller can cascade with one or more domaincontrollers and/or vehicle devices down through its UniversalAsynchronous Receiver/PPS interface, Ethernet interface, and otherinterfaces in the FlexRay interface, other than the master interface,and provide a time service to the one or more domain controllers and/orvehicle devices to complete the time synchronization of all of thenumber of domain controllers and one or more vehicle devices.

It is understood that two domain controllers cascaded with each othermay be cascaded directly, or indirectly through vehicle devices that arenot domain controllers present therebetween.

In this embodiment, at the vehicle assembly stage, the developer canutilize a variety of interfaces that the domain controller has, flexiblycascading a number of domain controllers and one or more vehicle devicesto each other in accordance with a predetermined structure, so thatduring normal operation of the vehicle, the time synchronization of alldomain controllers and vehicle devices in the synchronous network can beaccomplished in accordance with the predetermined structure between therespective domain controllers and vehicle devices in the synchronousnetwork. The architecture of the synchronous network may be flexiblydesigned according to practical requirements, effectively improving thescalability of device time synchronization in the vehicle.

In one embodiment, a computer device is provided that includes a memoryand a processor having stored therein a computer program that, whenexecuted, implements the following steps:

-   -   During the normal operation phase of the vehicle, the domain        controller is caused to perform any one of the steps to receive        a time service.    -   receiving the time service from an external device through the        UART/PPS interface;    -   receiving the time service from an external device through the        Ethernet interface through the switch; and    -   receiving the time service from an external device through the        FlexRay interface.

In other embodiments, the processor, when executing the computerprogram, also implements the steps of the time synchronization method ofthe domain controller as in any of the above embodiments and hascorresponding benefits.

In one embodiment, a computer readable storage medium is provided havingstored there on a computer program which, when executed by a processor,performs the following steps:

-   -   During the normal operation phase of the vehicle, the domain        controller is caused to perform any one of the steps to receive        a time service.    -   receiving the time service from an external device through the        UART/PPS interface;    -   receiving the time service from an external device through the        Ethernet interface through the switch; and    -   receiving the time service from an external device through the        FlexRay interface.

In other embodiments, a computer program, when executed by a processor,also implements the steps of a time synchronization method of a domaincontroller as in any of the above embodiments and has correspondingbenefits.

It will be appreciated by one of ordinary skill in the art that all orpart of the processes implemented in the methods described above can beaccomplished by computer program instructions that can be stored in anon-transitory computer readable storage medium that, when executed, cancomprise a flow of an embodiment of the methods as described above. Anyreferences to memory, storage, databases, or other media used in theembodiments provided herein may include non-volatile and/or volatilememory. Non-volatile memory may include read only memory (ROM),programmable ROM (PROM), electrically programmable ROM (EPROM),electrically erasable programmable ROM (EEPROM), or flash memory.Volatile memory may include random access memory (RAM) or external cachememory. By way of illustration and not limitation, RAM is available inmany forms such as static RAM (SRAM), dynamic RAM (DRAM), synchronousDRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM(ESDRAM), Synchlink DRAM (SLDRAM), Rambus direct RAM (RDRAM), directRambus dynamic RAM (DRDRAM), and Rambus dynamic RAM (RDRAM), etc.

The various technical features of the embodiments above may be combinedin any combination to describe every possible combination of the varioustechnical features in the embodiments described above, however, as longas the combination of these technical features does not contradict theconflict, it is to be considered the scope recited in thisspecification.

The embodiments described above represent only a few embodiments of thepresent application, which are described in greater detail and detail,but are not to be construed as limiting the scope of the invention. Itshould be noted that many variations and modifications may be made byone of ordinary skill in the art without departing from the concepts ofthe present application, which fall within the scope of the presentapplication. The scope of the invention should, therefore, be determinedwith reference to the appended claims.

What is claimed is:
 1. A time synchronization method for a domaincontroller; the domain controller is mounted in a vehicle and comprisesa plurality of system-on-chips (SOCs) and micro control units (MCUs);the plurality of the SOCs and the MCUs are respectively communicativelyconnected by a controller area network bus and are respectivelycommunicatively connected to a switch via an Ethernet; the switch hasexternal Ethernet interfaces; a main SOC among the plurality of the SOCshas external universal asynchronous receiver/transmitter (UART)/pulseper second (PPS) interfaces; and each of the micro control units has anexternal FlexRay interface; wherein the method comprises: causing thedomain controller to, under a normal operating phase of the vehicle,perform any of the steps as follows: receiving a time service from anexternal device through the UART/PPS interfaces wherein the externaldevice is another device inside the vehicle or a device on the externalof the vehicle; receiving a time service from the external devicethrough the Ethernet interfaces via the switch; and receiving a timeservice from the external device through the FlexRay interface.
 2. Thetime synchronization method for a domain controller of claim 1, whereinthe step of receiving a time service from an external device through theIJART/PPS interfaces comprises: communicatively connecting to globalnavigation satellite system (GNSS) timing source by the main SOC throughthe UART/PPS interfaces; receiving the PPS from the GNSS timing sourceand a coordinated universal time (UTC); and synchronizing a main SOCtime to the UTC by the PPS and the UTC; taking the synchronized main SOCtime as a master clock of a precise clock synchronization protocol inthe internal local area network of the domain controller; taking theremaining SOCs among the plurality of SOCs except the main SOC and themicro control units as the slave clock of the precise clocksynchronization protocol; and performing precise clock synchronizationprotocol time synchronization on the remaining SOCs and the MCU to thesynchronized main SOC time; and updating a real time clock time insidethe MCU to the main SOC time and stopping broadcasting a time message ofthe MCI_J on the controller area network bus after the MCI_J completesthe time synchronization of the precise clock synchronization protocol.3. The time synchronization method for a domain controller of claim 1,wherein the step of receiving a time service from the external devicethrough the Ethernet interfaces via the switch comprises:communicatively connected to an external clock source by the domaincontroller through the Ethernet interface via the switch; taking theexternal clock source as a master clock of the precise clocksynchronization protocol; taking the plurality of the SOCs and the MCUsof the domain controller as slave clocks of the precise clocksynchronization protocol; performing precise clock synchronizationprotocol time synchronization on the plurality of the SOCs and the microcontrol unit of the domain controller to the synchronized main SOC time;updating a real time clock time inside the MCU to the main SOC time andstopping broadcasting a time message of the MCU on the controller areanetwork bus after the MCU completes the time synchronization Of theprecise clock synchronization protocol.
 4. The time synchronizationmethod for a domain controller of claim 1, wherein the step of receivinga time service from the external device through the FlexRay interfacecomprises: connecting to a vehicle FlexRay bus, by the MCU, through theFlexRay interface and a FlexRay bus; synchronizing the MCU to a vehicledevice time connected to the vehicle FlexRay bus through a FlexRay time;updating a real time clock time inside the MCU to the vehicle devicetime and stopping broadcasting a time message of the MCU on thecontroller area network bus after the MCU completes the timesynchronization of the precise clock synchronization protocol; takingthe MCU as a master clock of the precise clock synchronization protocolof an internal local area network of the domain controller; taking theplurality of the SOCs as slave clocks of the precise clocksynchronization protocol; performing precise clock synchronizationprotocol time synchronization on the plurality of the SOCs to thesynchronized main SOC time.
 5. The time synchronization method for adomain controller of claim 1, further comprising: under a normaloperating phase of the vehicle and after the domain controller acceptsthe time service, causing the domain controller to perform any one ormore of the following steps to provide the time service to one or moreexternal devices; providing, the time service to external devices viathe UART/PPS interfaces; providing the time service to external devicesthrough the Ethernet interface via the switch; and providing the timeservice to external devices via the Flex Ray interface.
 6. The timesynchronization method tar a domain controller of claim 1, whereinduring a start-up phase of the vehicle prior to the normal operatingphase of the vehicle, the method further comprises: waking up the MCU ina dormant state through a wake-up message of a controller area networkbus of a vehicle, so that the Mal enters a normal working state;powering, resetting each SOC in the plurality of SOCs by the MCU andbroadcasting a time message of the MCU generated according to a timecount of a real-time clock of the MCU on the controller area networkbus; and synchronizing an initial time of each of the SOCs to the timeof the MCU by using the time message of the MCU broadcasted on thecontroller area network bus after each of the SoCs is reset.
 7. The timesynchronization method for the domain controller of claim 6, wherein thestep of synchronizing an initial time of each of the SOC to the time ofthe MCU by using the time message of the MCU broadcasted on thecontroller area network bus after each of the SOCs is reset comprises:starting a safety island processor in each of the SOCs after each of theSOCs is reset, receiving the time message of the MCU by the safetyisland processor through the controller area network bus so as to read alatest initialization time and correct the time of the safety islandprocessor to the latest initialization time; initiating; by the safetyisland processor in each of the SoCs, a general processor in the SOCwhere the safety island processor is located; and requesting, by each ofthe general processor, the current time of the safety island processorin the SOC where the general processor is located through an inter-corecommunication mode in a starting state of the embedded system andsynchronizing the time of the embedded system of the general processorto the current time of the safety island processor.
 8. The timesynchronization method far a domain controller of claim 6, wherein in astop phase of the vehicle before the start phase of the vehicle, the MCUis connected to a power supply of the vehicle and is kept powered on;the SOC is in a power-off state, and the MCU is in a sleep state; andthe real-time clock of the MCU maintains time counting, in the sleepstate.
 9. A time synchronization apparatus of a domain controller forperforming time synchronization of a domain controller, wherein thedomain controller is mounted in a vehicle: the domain controllercomprises a pluraltty of system-on-chips (SOCs) and micro control units(MCUs): the plurality of SOCs and the MCUs are respectivelycommunicatively connected through a controller area network bus and arerespectively connected to a switch through an Ethernet communication;the switch is provided with external Ethernet interfaces: a main SOC inthe plurality of SOCs is provided with an external universalasynchronous receiver! transmitter (UARTY pulse per second (PPS)interface; and each of the MCUs is provided with an external FlexRayimerface; the time synchronization apparatus of a domain controllercomprises: a time service accepting module, configured to enable thedomain controller to selectively execute any one of the following stepsto accept a time service during a normal working phase of the vehicle:receiving the time service from an external device through the UART/PPSinterface wherein the external device is another device inside thevehicle or a device on the external of the vehicle: receiving the timeservice from an external device through the Ethernet interface throughthe switch: and receiving the time service from an external devicethrough the FlexRay interface.
 10. A domain controller mounted in avehicle, comprising a plurality of system-on chips (SOCs) and microcontrol units (MCUs); wherein the plurality of the SOCs and the MCUs arerespectively communicatively connected by a controller area network busand are respectively communicatively connected to a switch through anEthernet, the switch is provided with external Ethernet interfaces; amain SOC among the plurality of the SOCs is provided external universalasynchronous receiver/transmitter (UART)/pulse per second (PPS)interfaces; and each of the MCUs is provided with an external FlexRayinterface; and the domain controller implements the steps of a timesynchronization method for the domain controller of claim
 1. 11. Anon-transitory computer readable storage medium having stored there on acomputer program, the computer program, when executed by a processor,implements the steps of a time synchronization method for the domaincontroller of claim 1.